Apple Sr. Electrical Engineer (FPGA Design) in Santa Clara Valley, California

Sr. Electrical Engineer (FPGA Design)

Job Number: 113665084

Santa Clara Valley, California, United States

Posted: 05-Apr-2018

Weekly Hours: 40.00

Job Summary

The Apple Engineering Team is looking for an energetic, creative, and self driven FPGA Design engineer with strong Electrical Engineering background to work on future Display hardware technologies. The candidate will work in a collaborative, exciting environment to integrate new technologies into Apple's products.

Key Qualifications

  • [+] Strong Analytical aptitude and meticulous attention to detail.

  • [+] Must be self-motivated in order to achieve assigned objectives with minimal supervision

  • [+] Must have shipped 3-4 products with FPGAs on it

  • [+] Min. 5 years of experience utilizing Xilinx Vivado Tool chain.

  • [+] Min. 10 years of hands-on experience with FPGA architecture, design, coding, simulating, and debugging FPGA on actual HW.

  • [+] Strong understanding how your HDL/RTL code will be synthesized into FPGA fabric. Code for performance!

  • [+] Good Electrical Engineering (EE) knowledge on FPGA's HW requirements - Terminations, Signal Integrity, DC Power supplies, Jitter specifications, IO planning etc.

  • [+] Hands-on experience using ANY 7 series Xilinx FPGAs - Artix-7, Kintex-7, Virtex-7, UltraScale, Zynq etc.

  • [+] Built FPGA designs involving high-performance interfaces like DDR2/3/4, LVDS, DSPs, Ethernet, etc.

  • [+] Experience using high-speed transceivers GTX/GTH/GTPs for interfaces like - MIPI, HDMI, DP, PCIE etc.

  • [+] Experience using high-speed data/control interfaces like SPI, UART, I2C etc.

  • [+] Experience using Microblaze and/or ARM based embedded processors.

  • [+] Hands-on experience using Xilinx or 3rd party IP, as well as create own IP when needed.

  • [+] Ability to translate SW algorithms in C/Perl/Python/Matlab into high performance HDL code.

  • [+] Good knowledge of FPGA Clock Regions, Bank IO Constraints, Clocking resources - CMTs, PLLs, DLLs etc.

  • [+] Understanding static timing analysis, and ability to fix timing issues.

  • [+] Must have practical lab debugging skills to bring-up FPGA designs on actual PCBs using Oscilloscope, Protocol Analyzers

  • [+] Ability to work effectively in a cross-functional product development HW & SW teams.

  • [+] Ability to select FPGA Devices based on RTL resource estimation & other HW system requirements from cross-functional teams.

  • [+] Ability to work on multiple projects in parallel.Description

[+] Demonstrate creativity in problem solving, ability to think out-of-box, and adapt quickly to new technical areas.

[+] Promote innovation and new technology to further enhance Apple's display performance and user experience.

[+] Create and give presentations before and after prototyping new ideas.

[+] Work in a team environment and negotiate solutions with HW / SW Engineering and Systems Engineering.

[+] Participate in all phases of the FPGA/EE design including requirements analysis and system architecture, RTL coding, module & system level test bench design, simulation, synthesis, verification and bring-up.

[+] Participate in HW design reviews, and help improve existing design.

[+] Communicate and demonstrate prototypes to Cross-Functional Teams.

[+] Mentor Junior colleagues when necessary.


[+] MS/BS in Electrical Engineering.

[+] MS with 5+ years, or BS with 8+ years of relevant EE & FPGA Design experience

Additional Requirements

[+] EE Component selection & circuit design experience is a Plus.

[+] EE Schematics & Board Design/Layout experience is a Plus.

[+] FW Development experience using C/C++ is a Plus.

[+] Scripting or Test Automation is a Plus.